Elements of High-Performance Reconfigurable Computing

Numerous application areas, including bioinformatics and computational biology (BCB), demand increasing amounts of processing capability. In many cases, the computation cores and data types are suited to field-programmable gate arrays (FPGAs). The challenge is identifying those design techniques that can extract high performance from the FPGA fabric while allowing efficient development of production-worthy program codes. After brief introductions to high-performance reconfigurable computing (HPRC) systems and some applications for which they are well suited, we present a dozen such techniques together with examples of their use in our own research in BCB. Each technique, if ignored in a naive implementation, would have cost at least a factor 2 in performance, with most saving a factor of 10 or more. We follow this by comparing HPRC with an alternative accelerator technology, the use of graphics processors for general-purpose computing (GPGPU). We conclude with a discussion of some implications for future HPRC development tools. * This chapter is based on two articles previously published by the IEEE: ‘‘Achieving High Performance with FPGA-Based Computing’’ which appeared in IEEE Computer in March 2007, and ‘‘Computing Models for FPGA-Based Accelerators’’ which appeared in IEEE Computing in Science and Engineering in November/December 2008. { Currently with Altera, Inc. ADVANCES IN COMPUTERS, VOL. 75 113 Copyright © 2009 Elsevier Inc. ISSN: 0065-2458/DOI: 10.1016/S0065-2458(08)00802-4 All rights reserved. Author's personal copy